1. Field of the Invention
The present invention relates to an apparatus and method for providing clock signals in a component layout on a board. More particularly, the present invention is directed to providing clock signals having respective adjustable clock skews to respective board components.
2. Description of Related Art
Presently, the most popular design for digital circuits is a synchronous design wherein all components on a board respond to the same clock signal, for synchronizing their operations. The most popular way of providing such synchronization is to provide a single clock generator for all clock signals used by all the components of the layout on a motherboard. However, because the distances are not the same between the clock generator and all the other components in the layout, each component will receive a clock signal that has a slightly different time shift. This slight difference is called a xe2x80x9cskew.xe2x80x9d
The skew of clock signals provided by a conventional clock generator has a fixed value. Circuit designers conventionally add exterior resistors and capacitors to the output pins of the clock generator chip to adjust the fixed clock skew provided by each of the output pins on the clock generator. The resistances and capacitances provided for pins connected to exterior components that are at a greater distance from the clock generator than other components should be less than that provided for the others. Thus, The resistance and capacitance provided for exterior components that are at a shorter distance from the clock generator must be increased to synchronize those components with each other. In particular, the CPU and any chipset, PCI bus and DRAM module are important components on the motherboard that must be synchronous to ensure accurate data transmission.
These conventional design procedures cost circuit designers much time and effort, they cannot be used in some motherboard and memory module layouts. Moreover, each time a clock generator chip is changed or the layout of a board modified, they are an expensive waste of human effort. This conventional way in which clock generator chips are installed in the layout of a board needs to be changed to meet consumer needs.
The present invention eliminates the cost of the time and effort required to adjust clock skew of all components on a motherboard in the prior art. In order to accomplish this, the present invention provide an apparatus and method for generating clock signals that has three operating modes: hardware setup, software setup or a combined hardware and software setup. A user adjusts a plurality of exterior switches of the apparatus according to the present invention or a Basic Input Output System (BIOS) of the motherboard to modify the clock skew parameter, thereby providing output clock signals having clock skews fitted to all components on the motherboard.
In one embodiment apparatus to setup the clock skew in accordance with the present invention comprises a hardware clock skew register, a voltage controlled oscillator and a delay module. The hardware clock skew register is used to store a combination provided by the plurality of switches. The voltage controlled oscillator is used to generate a basic clock. The delay module is connected to said hardware clock skew register and said voltage controlled oscillator and is used to generate the output clock signals according to the combination provided by said hardware clock skew register.
When the clock skew is set up using both hardware and software, the present invention comprises a hardware clock skew register, a software clock skew register, a clock skew control register, a first multiplexer, a voltage controlled oscillator, and a delay module. In one particular embodiment the clock skew is set up by software, said hardware clock skew register stores a constant value. In another particular embodiment where the clock skew is set up using both hardware and software, said hardware clock skew register is used to store a combination value determined by setting a plurality of exterior switches. The software clock skew register is used to store a value provided by said BIOS. The clock skew control register is used to store control instructions provided by said BIOS. The first multiplexer selects one of the values, either the value of the hardware clock skew register or the software clock skew register. The voltage controlled oscillator is used to generate a basic clock. The delay module is connected to said first multiplexer and said voltage controlled oscillator and has an output that provides a clock signal having a skew that corresponds to the value selected by said first multiplexer.
A further embodiment, where the clock skew is set up by software, is similar to the embodiment using both hardware and software setup. The difference is that the hardware clock skew register is not connected to the exterior switches in this software setup only embodiment. The hardware clock skew register itself provides a default value.
A method in accordance with the present invention comprises the following steps: system start up using a hardware and determining whether clock skew, to change from the default clock skews to another skew. If another skew is required by a BIOS of said system, a clock skew corresponding to a value provided by said BIOS is provided.